225 search results - page 22 / 45 » A Predictive Performance Model for Superscalar Processors |
75
Voted
IPPS
2008
IEEE
15 years 4 months ago
2008
IEEE
Weather and climate prediction software has enjoyed the benefits of exponentially increasing processor power for almost 50 years. Even with the advent of large-scale parallelism ...
ICCD
2005
IEEE
15 years 6 months ago
2005
IEEE
Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access ...
ISPASS
2007
IEEE
15 years 4 months ago
2007
IEEE
Recent research advocates address-correlating predictors to identify cache block addresses for prefetch. Unfortunately, address-correlating predictors require correlation data sto...
102
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CASES
2006
ACM
15 years 3 months ago
2006
ACM
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
123
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SIGOPS
2010
14 years 4 months ago
2010
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...