225 search results - page 29 / 45 » A Predictive Performance Model for Superscalar Processors |
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IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Predicting how well applications may run on modern systems is becoming increasingly challenging. It is no longer sufficient to look at number of floating point operations and commu...
ICS
2009
Tsinghua U.
15 years 4 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
ASPDAC
2000
ACM
15 years 2 months ago
2000
ACM
— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered archite...
SIGMETRICS
2003
ACM
15 years 2 months ago
2003
ACM
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
77
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ISCA
1997
IEEE
15 years 1 months ago
1997
IEEE
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...