225 search results - page 44 / 45 » A Predictive Performance Model for Superscalar Processors |
ICS
2001
Tsinghua U.
13 years 10 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
DAC
2010
ACM
13 years 6 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
ECRTS
2006
IEEE
14 years 12 days ago
2006
IEEE
There is an increasing demand to introduce adaptive capabilities in distributed real-time and embedded (DRE) systems that execute in open environments where system operational con...
HPDC
2008
IEEE
14 years 24 days ago
2008
IEEE
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
ISCA
2009
IEEE
14 years 1 months ago
2009
IEEE
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...