We propose a new architecture for a content protection system that conceals confidential data and algorithms in an FPGA as electrical circuits. This architecture is designed for a...
In this paper, we use a digital signal processor (DSP) to implement a real-time H.263+ codec. We use fast algorithms to reduce the codec computational complexity. Furthermore, the...
This paper combines an adaptive supply-voltage scheme with self-timed CMOS digital design, to achieve low power performance. The supply-voltage automatically tracks the input data...
Abstract. Many coded digital watermarking systems development requires first the selection of a (uncoded) modulation technique to be part of a coded architecture. Therefore, perfo...
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
Liang Han, Jie Chen, Chaoxian Zhou, Ying Li, Xin Z...