497 search results - page 66 / 100 » A Processing for Digitizing Historical Architecture |
96
Voted
KES
2006
Springer
15 years 16 days ago
2006
Springer
This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is to implement a ...
113
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PIMRC
2010
IEEE
14 years 10 months ago
2010
IEEE
Abstract--Dynamic spectrum access (DSA) supporting opportunistic transmission without extra spectrum bandwidth is attractive for future wireless communication. To facilitate such D...
ECCTD
2011
14 years 11 days ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
101
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VLSID
2007
IEEE
16 years 29 days ago
2007
IEEE
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
121
Voted
ANCS
2007
ACM
15 years 4 months ago
2007
ACM
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...