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95
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DATE
2009
IEEE
135views Hardware» more  DATE 2009»
15 years 7 months ago
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi
96
Voted
FTEDA
2007
156views more  FTEDA 2007»
15 years 10 days ago
FPGA Architecture: Survey and Challenges
Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their archite...
Ian Kuon, Russell Tessier, Jonathan Rose
96
Voted
TVLSI
2010
14 years 7 months ago
Computation Error Analysis in Digital Signal Processing Systems With Overscaled Supply Voltage
It has been recently demonstrated that digital signal processing systems may possibly leverage unconventional voltage overscaling (VOS) to reduce energy consumption while maintaini...
Yang Liu, Tong Zhang, Keshab K. Parhi
103
Voted
CAMP
2005
IEEE
15 years 6 months ago
Low Power Image Processing: Analog Versus Digital Comparison
— In this paper, a programmable analog retina is presented and compared with state of the art MPU for embedded imaging applications. The comparison is based on the energy require...
Jacques-Olivier Klein, Lionel Lacassagne, Herv&eac...
ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
15 years 4 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis