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» A Proposal for Task Parallelism in OpenMP
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NSPW
2004
ACM
13 years 11 months ago
Support for multi-level security policies in DRM architectures
Digital rights management systems allow copyrighted content to be commercialized in digital format without the risk of revenue loss due to piracy. Making such systems secure is no...
Bogdan C. Popescu, Bruno Crispo, Andrew S. Tanenba...
DATE
2010
IEEE
113views Hardware» more  DATE 2010»
13 years 11 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
CODES
2009
IEEE
13 years 11 months ago
A tuneable software cache coherence protocol for heterogeneous MPSoCs
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
Frank E. B. Ophelders, Marco Bekooij, Henk Corpora...
ESOP
1990
Springer
13 years 10 months ago
Algebraic Properties of Program Integration
The need to integrate several versions of a program into a common one arises frequently, but it is a tedious and time consuming task to merge programs by hand. The program-integrat...
Thomas W. Reps
AAAI
2008
13 years 8 months ago
CIGAR: Concurrent and Interleaving Goal and Activity Recognition
In artificial intelligence and pervasive computing research, inferring users' high-level goals from activity sequences is an important task. A major challenge in goal recogni...
Derek Hao Hu, Qiang Yang