Providing Quality of Service (QoS) to inelastic data transmissions in a cost-efficient, highly scalable, and realistic fashion in IP networks remains a challenging research issue....
Krishna Pandit, Jens Schmitt, Martin Karsten, Ralf...
In this paper, we study the technology mapping problem for a novel FPGA architecture that is based on k-input single-output PLA-like cells, or, k/m-macrocells. Each cell in this a...
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Conventional wireless networks employ a contention based channel access mechanism, which not only imposes high latency but also reduces goodput of the network. Lack of interference...
Dola Saha, Aveek Dutta, Dirk Grunwald, Douglas C. ...