In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
A number of new network storage architectures have emerged recently that provide shared, adaptable and high-performance storage systems for dataintensive applications. Three commo...
Current IT application domains such as web services and autonomic computing call for highly flexible systems, able to automatically adapt to changing operational environments as w...
Loris Penserini, Anna Perini, Angelo Susi, John My...
In this paper, we introduce the concept of dynamically changing between centralized, replicated, and hybrid collaboration architectures. It is implemented by providing users a fun...
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...