Sciweavers

143 search results - page 10 / 29
» A Reconfigurable Content Addressable Memory
Sort
View
SPIN
2010
Springer
14 years 8 months ago
An Automata-Based Symbolic Approach for Verifying Programs on Relaxed Memory Models
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
Alexander Linden, Pierre Wolper
ISPASS
2007
IEEE
15 years 3 months ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
ECRTS
2008
IEEE
15 years 4 months ago
Predictable Code and Data Paging for Real Time Systems
There is a need for using virtual memory in real-time applications: using virtual addressing provides isolation between concurrent processes; in addition, paging allows the execut...
Damien Hardy, Isabelle Puaut
MICRO
2010
IEEE
210views Hardware» more  MICRO 2010»
14 years 7 months ago
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor H...
INFOCOM
2012
IEEE
13 years 1 days ago
Block permutations in Boolean Space to minimize TCAM for packet classification
Packet classification is one of the major challenges in designing high-speed routers and firewalls as it involves sophisticated multi-dimensional searching. Ternary Content Address...
Rihua Wei, Yang Xu, H. Jonathan Chao