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» A Refactoring Approach to Parallelism
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136
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EUROPAR
2004
Springer
15 years 10 months ago
A Data Management and Communication Layer for Adaptive, Hexahedral FEM
The parallel realization of adaptive finite element methods (FEM) has to deal with several irregular and dynamic algorithmic properties caused by adaptive mesh refinement (AMR). ...
Judith Hippold, Gudula Rünger
IPPS
2002
IEEE
15 years 10 months ago
Fast Inductance Extraction of Large VLSI Circuits
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
Hemant Mahawar, Vivek Sarin, Weiping Shi
125
Voted
ICS
2010
Tsinghua U.
15 years 9 months ago
Cache oblivious parallelograms in iterative stencil computations
We present a new cache oblivious scheme for iterative stencil computations that performs beyond system bandwidth limitations as though gigabytes of data could reside in an enormou...
Robert Strzodka, Mohammed Shaheen, Dawid Pajak, Ha...
IEEEPACT
2000
IEEE
15 years 9 months ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
ICS
1999
Tsinghua U.
15 years 9 months ago
Low-level router design and its impact on supercomputer system performance
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
Valentin Puente, José A. Gregorio, Cruz Izu...