4889 search results - page 934 / 978 » A Refactoring Approach to Parallelism |
125
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HPCA
2009
IEEE
16 years 4 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
126
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HPCA
2008
IEEE
16 years 4 months ago
2008
IEEE
Power consumption within the disk-based storage subsystem forms a substantial portion of the overall energy footprint in commodity systems. Researchers have proposed external cach...
127
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HPCA
2008
IEEE
16 years 4 months ago
2008
IEEE
A path confidence estimate indicates the likelihood that the processor is currently fetching correct path instructions. Accurate path confidence prediction is critical for applica...
128
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HPCA
2007
IEEE
16 years 4 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
151
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HPCA
2007
IEEE
16 years 4 months ago
2007
IEEE
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...