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RTAS
2007
IEEE
15 years 4 months ago
Performance Debugging of Real-Time Systems Using Multicriteria Schedulability Analysis
Most of today’s real-time embedded systems consist of a heterogeneous mix of fully-programmable processors, fixed-function components or hardware accelerators, and partially-pr...
Unmesh D. Bordoloi, Samarjit Chakraborty
HIPC
2000
Springer
15 years 1 months ago
Instruction Level Distributed Processing
Within two or three technology generations, processor architects will face a number of major challenges. Wire delays will become critical, and power considerations will temper the ...
James E. Smith
VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
15 years 3 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
FPL
2006
Springer
161views Hardware» more  FPL 2006»
15 years 1 months ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
SAC
2003
ACM
15 years 3 months ago
ARCHITECT-R: A System for Reconfigurable Robots Design
An increasing interest in the design of mobile robots has been observed in recent years, which is mainly motivated by technological advances that may allow their application to co...
R. A. Gonçalves, P. A. Moraes, João ...