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ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
14 years 7 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
ISCA
2011
IEEE
240views Hardware» more  ISCA 2011»
14 years 1 months ago
Virtualizing performance asymmetric multi-core systems
Performance-asymmetric multi-cores consist of heterogeneous cores, which support the same ISA, but have different computing capabilities. To maximize the throughput of asymmetric...
Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jae...
ACNS
2008
Springer
103views Cryptology» more  ACNS 2008»
15 years 4 months ago
A Very Compact "Perfectly Masked" S-Box for AES
Implementations of the Advanced Encryption Standard (AES), including hardware applications with limited resources (e.g., smart cards), may be vulnerable to “side-channel attacksâ...
D. Canright, Lejla Batina
INFOCOM
2007
IEEE
15 years 4 months ago
An Open and Scalable Emulation Infrastructure for Large-Scale Real-Time Network Simulations
— We present a software infrastructure that embeds physical hosts in a simulated network. Aiming to create a largescale real-time virtual network testbed, our real-time interacti...
Jason Liu, Scott Mann, Nathanael Van Vorst, Keith ...
VR
2000
IEEE
172views Virtual Reality» more  VR 2000»
15 years 2 months ago
An Intelligent User Interface with Motion Planning for 3D Navigation
Due to the rapid evolution of graphics hardware, interactive 3D graphics is becoming popular on desktop personal computers. However, it remains a challenging task for a novice use...
Tsai-Yen Li, Hung-Kai Ting