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MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
15 years 2 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
15 years 2 months ago
VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks
Recent technological advances have produced network interfaces that provide users with very low-latency access to the memory of remote machines. We examine the impact of such netw...
Leonidas I. Kontothanassis, Galen C. Hunt, Robert ...
NOSSDAV
2009
Springer
15 years 4 months ago
Random network coding on the iPhone: fact or fiction?
In multi-hop wireless networks, random network coding represents the general design principle of transmitting random linear combinations of blocks in the same “batch” to downs...
Hassan Shojania, Baochun Li
EMSOFT
2009
Springer
15 years 4 months ago
Handling mixed-criticality in SoC-based real-time embedded systems
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
DAC
2006
ACM
15 years 10 months ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...