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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
15 years 4 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
WWW
2009
ACM
15 years 10 months ago
Using graphics processors for high performance IR query processing
Web search engines are facing formidable performance challenges as they need to process thousands of queries per second over billions of documents. To deal with this heavy workloa...
Shuai Ding, Jinru He, Hao Yan, Torsten Suel
HPCA
2006
IEEE
15 years 10 months ago
Probabilistic counter updates for predictor hysteresis and stratification
Hardware counters are a fundamental building block of modern high-performance processors. This paper explores two applications of probabilistic counter updates, in which the outpu...
Nicholas Riley, Craig B. Zilles
MOBISYS
2006
ACM
15 years 9 months ago
Using smart triggers for improved user performance in 802.11 wireless networks
The handoff algorithms in the current generation of 802.11 networks are primarily reactive in nature, because they wait until the link quality degrades substantially to trigger a ...
Vivek Mhatre, Konstantina Papagiannaki
ICDCS
2009
IEEE
15 years 6 months ago
QVS: Quality-Aware Voice Streaming for Wireless Sensor Networks
Recent years have witnessed the pilot deployments of audio or low-rate video wireless sensor networks for a class of mission-critical applications including search and rescue, sec...
Liqun Li, Guoliang Xin, Limin Sun, Yan Liu