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RTAS
2007
IEEE
15 years 8 months ago
Optimizing the FPGA Implementation of HRT Systems
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
Marco Di Natale, Enrico Bini
EUSFLAT
2003
106views Fuzzy Logic» more  EUSFLAT 2003»
15 years 3 months ago
An XML vocabulary for soft computing
This paper presents iXSCL, an XML based language for the specification of objects in the Soft Computing area. iXSCL adopts a compositional approach in which objects are construct...
Adolfo R. de Soto, Conrado A. Capdevila, Eva Cuerv...
FPL
2009
Springer
156views Hardware» more  FPL 2009»
15 years 6 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
FCCM
2005
IEEE
96views VLSI» more  FCCM 2005»
15 years 7 months ago
Preliminary Report: FPGA Acceleration of Molecular Dynamics Computations
Abstract: Molecular Dynamics (MD) is of central importance to computational chemistry and its myriad applications. Here we show that, at even a preliminary stage of development, MD...
Yongfeng Gu, Tom Van Court, Douglas DiSabello, Mar...
DATE
2008
IEEE
90views Hardware» more  DATE 2008»
15 years 8 months ago
Computation of Buffer Capacities for Throughput Constrained and Data Dependent Inter-Task Communication
Abstract - Streaming applications are often implemented as task graphs. Currently, techniques exist to derive buffer capacities that guarantee satisfaction of a throughput constrai...
Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit