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ATS
2001
IEEE
137views Hardware» more  ATS 2001»
15 years 1 months ago
Compaction Schemes with Minimum Test Application Time
Testing embedded cores in a System-on-a-chip necessitates the use of a Test Access Mechanism, which provides for transportation of the test data between the chip and the core I/Os...
Ozgur Sinanoglu, Alex Orailoglu
FPL
2001
Springer
102views Hardware» more  FPL 2001»
15 years 2 months ago
Technology Trends and Adaptive Computing
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
Michael J. Flynn, Albert A. Liddicoat
CAV
2009
Springer
123views Hardware» more  CAV 2009»
15 years 1 months ago
On Using Floating-Point Computations to Help an Exact Linear Arithmetic Decision Procedure
We consider the decision problem for quantifier-free formulas whose atoms are linear inequalities interpreted over the reals or rationals. This problem may be decided using satisf...
David Monniaux
ICCAD
2003
IEEE
159views Hardware» more  ICCAD 2003»
15 years 6 months ago
Array Composition and Decomposition for Optimizing Embedded Applications
Optimizing array accesses is extremely critical in embedded computing as many embedded applications make use of arrays (in form of images, video frames, etc). Previous research co...
Guilin Chen, Mahmut T. Kandemir, A. Nadgir, Ugur S...
ASAP
2002
IEEE
103views Hardware» more  ASAP 2002»
15 years 2 months ago
PAPA - Packed Arithmetic on a Prefix Adder for Multimedia Applications
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...
Neil Burgess