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ASPLOS
2011
ACM
14 years 10 months ago
Improving software diagnosability via log enhancement
Diagnosing software failures in the field is notoriously difficult, in part due to the fundamental complexity of trouble-shooting any complex software system, but further exacer...
Ding Yuan, Jing Zheng, Soyeon Park, Yuanyuan Zhou,...
CODES
2002
IEEE
15 years 11 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
ATAL
2008
Springer
15 years 8 months ago
Pan-supplier stock control in a virtual warehouse
We describe the commercial application of agents to the handling of catalogue and stock-control for the selling of books on the internet. The primary characteristic of the target ...
Emad El-Deen El-Akehal, Julian A. Padget
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
15 years 10 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty
EIT
2009
IEEE
16 years 1 months ago
System-level memory modeling for bus-based memory architecture exploration
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...
Zhongbo Cao, Ramon Mercado, Diane T. Rover