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CODES
2005
IEEE
15 years 10 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
FDL
2003
IEEE
15 years 9 months ago
Object-Oriented ASIP Design and Synthesis
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft
CASES
2007
ACM
15 years 8 months ago
A fast and generic hybrid simulation approach using C virtual machine
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...
Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Asch...
HPCA
2009
IEEE
16 years 4 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
CNSR
2005
IEEE
210views Communications» more  CNSR 2005»
15 years 6 months ago
A Framework for Self-Management of Hybrid Wireless Networks Using Autonomic Computing Principles
The dramatic increase in the number of mobile subscribers has put a significant resource and service provisioning strain on current cellular networks in particular in terms of mu...
Chong Shen, Dirk Pesch, James Irvine