237 search results - page 9 / 48 » A Scalable FPGA-based Multiprocessor |
ICS
1995
Tsinghua U.
15 years 1 months ago
1995
Tsinghua U.
SOSP
1997
ACM
14 years 11 months ago
1997
ACM
81
Voted
FPL
2006
Springer
15 years 1 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
127
Voted
ERSA
2007
14 years 11 months ago
2007
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
PPOPP
1995
ACM
15 years 1 months ago
1995
ACM
Scalable busy-wait synchronization algorithms are essential for achieving good parallel program performance on large scale multiprocessors. Such algorithms include mutual exclusio...