210 search results - page 5 / 42 » A Self-Reconfigurable Gate Array Architecture |
101
Voted
DAC
2000
ACM
16 years 18 days ago
2000
ACM
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
110
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IJVR
2007
14 years 11 months ago
2007
—To construct 3D virtual scenes from two-dimensional images with depth information, image warping techniques could be used. In this paper, a novel approach of cylindrical depth i...
72
Voted
FPL
2008
Springer
15 years 1 months ago
2008
Springer
This paper presents a versatile hardware architecture that implements six variant of the CFAR detector based on linear and non-linear operations. Since some implemented CFAR detec...
84
Voted
CHES
2001
Springer
15 years 4 months ago
2001
Springer
Abstract. This work proposes a new elliptic curve processor architecture for the computation of point multiplication for curves defined over fields GF(p). This is a scalable arch...
85
Voted
FPL
2000
Springer
15 years 3 months ago
2000
Springer
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...