109 search results - page 18 / 22 » A Self-Tuning Cache Architecture for Embedded Systems |
106
Voted
WCET
2010
14 years 9 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...
VLSID
2001
IEEE
16 years 37 min ago
2001
IEEE
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizationsfor programmable systems assumed a fixed cache hierarchy. Withthe wideningproce...
101
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RTSS
2007
IEEE
15 years 5 months ago
2007
IEEE
Recently, cheap and large capacity non-volatile memory such as flash memory is rapidly replacing disks not only in embedded systems, but also in high performance servers. Unlike ...
109
click to vote
RTAS
2008
IEEE
15 years 6 months ago
2008
IEEE
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
90
Voted
ICCD
1999
IEEE
15 years 3 months ago
1999
IEEE
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...