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» A Self-Tuning Configurable Cache
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HPCA
2006
IEEE
16 years 14 hour ago
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads
With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and d...
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob
101
Voted
CF
2005
ACM
15 years 1 months ago
Drowsy region-based caches: minimizing both dynamic and static power dissipation
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
Michael J. Geiger, Sally A. McKee, Gary S. Tyson
94
Voted
VLDB
1998
ACM
131views Database» more  VLDB 1998»
15 years 3 months ago
An Asynchronous Avoidance-Based Cache Consistency Algorithm for Client Caching DBMSs
We present a new client cache consistency algorithm for client caching database management systems. The algorithm, called Asynchronous Avoidance-based Cache Consistency (AACC), pr...
M. Tamer Özsu, Kaladhar Voruganti, Ronald C. ...
DATE
1999
IEEE
113views Hardware» more  DATE 1999»
15 years 4 months ago
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
William Fornaciari, Donatella Sciuto, Cristina Sil...
FPL
2000
Springer
143views Hardware» more  FPL 2000»
15 years 3 months ago
Memory Access Schemes for Configurable Processors
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
Holger Lange, Andreas Koch