This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Abstract— This paper presents a novel multi-functional MultipleInput Multiple-Output (MIMO) scheme that combines the benefits of the Vertical Bell Labs Layered Space-Time (V-BLA...
—Iterative K-best sphere detection (SD) and channel decoding is appealing, since it is capable of achieving a nearmaximum-a-posteriori (MAP) performance at a low complexity. Howe...
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...