The use of a single pass/fail threshold for IDDQ testing is unworkable as chip background currents increase to the point where they exceed many defect currents. This paper describ...
Peter C. Maxwell, Pete O'Neill, Robert C. Aitken, ...
Abstract. Finding paths in high-dimensional gemetric spaces is a provably hard problem. Recently, a general randomized planning scheme has emerged as an e ective approach to solve ...
David Hsu, Lydia E. Kavraki, Jean-Claude Latombe, ...
In this paper, we describe two new ideas by which HPF compiler can deal with irregular computations e ectively. The rst mechanism invokes a user speci ed mapping procedure via a s...
-- In previous work, Hu and Dill identified a common cause of BDD-size blowup in high-level design verification and proposed the method of implicitly conjoined invariants to addres...
Static path analysis is a key process of Worst Case Execution Time (WCET) estimation, the objective of which is to find the execution path that has the largest execution time. Cur...
Mingsong Lv, Zonghua Gu, Nan Guan, Qingxu Deng, Ge...