188 search results - page 6 / 38 » A Simulator for the Reconfigurable Mesh Architecture |
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
ERSA
2009
14 years 7 months ago
2009
We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
TMC
2012
12 years 12 months ago
2012
—This paper studies video multicasting in large scale areas using wireless mesh networks. The focus is on the use of Internet access gateways that allow a choice of alternative r...
73
Voted
ERSA
2009
14 years 7 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
73
Voted
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...