Most RAID controllers implemented in industry are complicated and di cult to reason about. This complexity has led to software and hardware systems that are di cult to debug and h...
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
It is widely accepted that middleware is an important architectural element which facilitates the development of software systems. In this paper we propose a novel approach for de...
Tarcisio da Rocha, Anna-Brith Arntsen, Arne Ketil ...
Abstract. The integration of COTS components into a system under development entails architectural mismatches. These have been tackled, so far, at the component level, through comp...