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ICCD
1999
IEEE
122views Hardware» more  ICCD 1999»
15 years 2 months ago
Design and Evaluation of a Selective Compressed Memory System
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
AIS
2004
Springer
15 years 3 months ago
Proposal of High Level Architecture Extension
The paper proposes three dimensional extension to High Level ARchitecture (HLA) and Runtime Infrastructure (RTI) to solve several issues such as security, information hiding proble...
Jae-Hyun Kim, Tag Gon Kim
ISSS
2002
IEEE
176views Hardware» more  ISSS 2002»
15 years 2 months ago
Controller Estimation for FPGA Target Architectures during High-Level Synthesis
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
DAC
1997
ACM
15 years 1 months ago
Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study
: Numerous fast algorithms for the Discrete Cosine Transform DCT have been proposed. Until recently, it has been di cult to compare di erent DCT algorithms and select one which i...
Miodrag Potkonjak, Kyosun Kim, Ramesh Karri
HPCN
1995
Springer
15 years 1 months ago
Mermaid: modelling and evaluation research in MIMD architecture design
The Mermaid project focuses on the construction of simulation models for MIMD multi-computers in order to evaluate them and to give estimates of the system’s performance. A multi...
Andy D. Pimentel, J. van Brummen, T. Papathanassia...