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» A Software Process Scheduling Simulator
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HPCA
2006
IEEE
15 years 10 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
ADAEUROPE
2005
Springer
15 years 3 months ago
Non-intrusive System Level Fault-Tolerance
This paper describes the methodology used to add nonintrusive system-level fault tolerance to an electronic throttle controller. The original model of the throttle controller is a...
Kristina Lundqvist, Jayakanth Srinivasan, Sé...
ICSE
1997
IEEE-ACM
15 years 2 months ago
Analyzing Partially-Implemented Real-Time Systems
—Most analysis methods for real-time systems assume that all the components of the system are at roughly the same stage of development and can be expressed in a single notation, ...
George S. Avrunin, James C. Corbett, Laura K. Dill...
EMSOFT
2007
Springer
15 years 2 months ago
Necessary and sufficient conditions for deterministic desynchronization
Synchronous reactive formalisms associate concurrent behaviors to precise schedules on global clock(s). This allows a non-ambiguous notion of "absent" signal, which can ...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...
CASES
2001
ACM
15 years 1 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...