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DAC
2008
ACM
16 years 2 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
COMPSAC
2008
IEEE
15 years 8 months ago
Embedded Architecture Description Language
In the state-of-the-art hardware/software (HW/SW) codesign of embedded systems, there is a lack of sufficient support for architectural specifications across HW/SW boundaries. S...
Juncao Li, Nicholas T. Pilkington, Fei Xie, Qiang ...
CODES
2000
IEEE
15 years 6 months ago
Automatic test bench generation for simulation-based validation
In current design practice synthesis tools play a key role, letting designers to concentrate on the specificationof the system being designed by carrying out repetitive tasks such...
Marcello Lajolo, Luciano Lavagno, Maurizio Rebaude...
CAISE
2001
Springer
15 years 6 months ago
Techniques for Reactive System Design: The Tools in TRADE
Reactive systems are systems whose purpose is to maintain a certain desirable state of affairs in their environment, and include information systems, groupware, workflow systems,...
Roel Wieringa, David N. Jansen
127
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DAC
2003
ACM
16 years 2 months ago
Automated synthesis of efficient binary decoders for retargetable software toolkits
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
Wei Qin, Sharad Malik