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IJNS
2000
130views more  IJNS 2000»
14 years 11 months ago
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems
An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach ...
Teresa Serrano-Gotarredona, Andreas G. Andreou, Be...
DAC
2004
ACM
16 years 22 days ago
A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
Chong Zhao, Xiaoliang Bai, Sujit Dey
SAMOS
2007
Springer
15 years 5 months ago
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and
Abstract— This paper explores the resistance of MOS Current Mode Logic (MCML) against Differential Power Analysis (DPA) attacks. Circuits implemented in MCML, in fact, have uniqu...
Francesco Regazzoni, Stéphane Badel, Thomas...
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MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 5 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect
Single-walled carbon nanotube (SWCNT) bundles have the potential to provide an attractive solution for the resistivity and electromigration problems faced by traditional copper int...
Arthur Nieuwoudt, Mosin Mondal, Yehia Massoud