340 search results - page 20 / 68 » A Statistical Performance Simulation Methodology for VLSI Ci... |
118
click to vote
GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
120
click to vote
CODES
2010
IEEE
14 years 9 months ago
2010
IEEE
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
DAC
1998
ACM
16 years 22 days ago
1998
ACM
In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied ...
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
GLVLSI
2005
IEEE
15 years 5 months ago
2005
IEEE
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in ...