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GLVLSI
2009
IEEE
128views VLSI» more  GLVLSI 2009»
15 years 3 months ago
Impact of lithography-friendly circuit layout
Current lithography techniques use a light wavelength of 193nm to print sub-65nm features. This introduces process variations which cause mismatches between desired and actual waf...
Pratik J. Shah, Jiang Hu
DAC
2003
ACM
16 years 22 days ago
Support vector machines for analog circuit performance representation
The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parame...
Fernando De Bernardinis, Michael I. Jordan, Albert...
DFT
2005
IEEE
92views VLSI» more  DFT 2005»
15 years 5 months ago
Simulating Faults of Combinational IP Core-based SOCs in a PLI Environment
This paper presents a new test methodology which utilizes the Programming Language Interface (PLI) for performing fault simulation of combinational or full scan Intellectual Prope...
Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lom...
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
15 years 4 months ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
ISCAS
2006
IEEE
79views Hardware» more  ISCAS 2006»
15 years 5 months ago
Spike timing dependent adaptation for mismatch compensation
— This paper presents some circuitry for use within a visual-processing depth-recovery algorithm based upon spike timing. The accuracy of the depth calculation relies on a predic...
Katherine L. Cameron, Alan F. Murray, S. Collins