340 search results - page 32 / 68 » A Statistical Performance Simulation Methodology for VLSI Ci... |
GLVLSI
2005
IEEE
15 years 5 months ago
2005
IEEE
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...
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DATE
2009
IEEE
15 years 3 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
SBCCI
2005
ACM
15 years 5 months ago
2005
ACM
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
ISPD
2006
ACM
15 years 5 months ago
2006
ACM
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
VLSID
2002
IEEE
16 years 5 days ago
2002
IEEE
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...