340 search results - page 36 / 68 » A Statistical Performance Simulation Methodology for VLSI Ci... |
102
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DAC
2003
ACM
15 years 5 months ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
VTS
2002
IEEE
15 years 4 months ago
2002
IEEE
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
DAC
2004
ACM
16 years 23 days ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
203
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GLVLSI
2011
IEEE
14 years 3 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
108
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ISSS
2002
IEEE
15 years 4 months ago
2002
IEEE
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...