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GLVLSI
2007
IEEE
114views VLSI» more  GLVLSI 2007»
15 years 6 months ago
Design of mixed gates for leakage reduction
Leakage power dissipation is one of the most critical factors for the overall current dissipation and future designs. However, design techniques for the reduction of leakage power...
Frank Sill, Jiaxi You, Dirk Timmermann
VLSID
2007
IEEE
128views VLSI» more  VLSID 2007»
16 years 6 days ago
A Low Power Frequency Multiplication Technique for ZigBee Transciever
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
Jagdish Nayayan Pandey, Sudhir S. Kudva, Bharadwaj...
GLOBECOM
2008
IEEE
15 years 6 months ago
Performance Metric Sensitivity Computation for Optimization and Trade-Off Analysis in Wireless Networks
Abstract—We develop and evaluate a new method for estimating and optimizing various performance metrics for multihop wireless networks, including MANETs. We introduce an approxim...
John S. Baras, Vahid Tabatabaee, George Papageorgi...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
15 years 6 months ago
Integrated approach to energy harvester mixed technology modelling and performance optimisation
This paper presents an integrated approach to energy harvester modelling and performance optimisation where the complete mixed physical-domain energy harvester system (micro gener...
Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashim...
ASPDAC
2005
ACM
98views Hardware» more  ASPDAC 2005»
15 years 1 months ago
Process variation robust clock tree routing
As the minimum feature sizes of VLSI circuits get smaller while the clock frequency increases, the effects of process variations become significant. We propose a UST/DME based ap...
Wai-Ching Douglas Lam, Cheng-Kok Koh