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IPPS
2005
IEEE
15 years 5 months ago
Self-Adaptive Scheduler Parameterization via Online Simulation
High-end parallel systems present a tremendous research challenge on how to best allocate their resources to match dynamic workload characteristics and user habits that are often ...
Barry Lawson, Evgenia Smirni
TVLSI
2010
14 years 6 months ago
Resource Based Optimization for Simultaneous Shield and Repeater Insertion
A new approach for resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resu...
Renatas Jakushokas, Eby G. Friedman
GLVLSI
2009
IEEE
154views VLSI» more  GLVLSI 2009»
15 years 6 months ago
Design of a maximum-likelihood detector for cooperative communications in intersymbol interference channels
Recently, cooperative communication has attracted a lot of attention for its potential to increase spatial diversity. However, limited attention has been paid to the physical laye...
Yanjie Peng, Andrew G. Klein, Xinming Huang
GLVLSI
2006
IEEE
142views VLSI» more  GLVLSI 2006»
15 years 5 months ago
Dynamic instruction schedulers in a 3-dimensional integration technology
We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the c...
Kiran Puttaswamy, Gabriel H. Loh
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
15 years 5 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...