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DATE
2009
IEEE
242views Hardware» more  DATE 2009»
15 years 4 months ago
A high performance reconfigurable Motion Estimation hardware architecture
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilk...
INTEGRATION
2007
98views more  INTEGRATION 2007»
14 years 9 months ago
Hashchip: A shared-resource multi-hash function processor architecture on FPGA
The ubiquitous presence of mobile devices and the demand for better performance and efficiency have motivated research into embedded implementations of cryptography algorithms. I...
T. S. Ganesh, Michael T. Frederick, T. S. B. Sudar...
ACRI
2008
Springer
15 years 3 months ago
Automatic Design of FPGA Processor for the Backtracking of DNA Sequences Evolution Using Cellular Automata and Genetic Algorithm
In several cases, the DNA sequences of an organism are available in different stages of its evolution and it is desirable to reconstruct the DNA sequence in a previous evolution st...
Georgios Ch. Sirakoulis
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
15 years 6 months ago
Application-specific customization of parameterized FPGA soft-core processors
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
David Sheldon, Rakesh Kumar, Roman L. Lysecky, Fra...
FPL
2004
Springer
90views Hardware» more  FPL 2004»
15 years 1 months ago
Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation
Abstract. This paper presents a new data representation known as Dual FiXedpoint (DFX), which employs a single bit exponent to select two different fixedpoint scalings. DFX provide...
Chun Te Ewe, Peter Y. K. Cheung, George A. Constan...