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DATE
2010
IEEE
121views Hardware» more  DATE 2010»
15 years 2 months ago
Cost modeling and cycle-accurate co-simulation of heterogeneous multiprocessor systems
—In this paper, we present a method to analyze different implementations of stream-based applications on heterogeneous multiprocessor systems. We take both resource usage and per...
Sven van Haastregt, Eyal Halm, Bart Kienhuis
DAGSTUHL
2007
14 years 11 months ago
Energy Scalability and the RESUME Scalable Video Codec
In the context of the RESUME-project a scalable wavelet-based video decoder was built to demonstrate the benefits of reconfigurable hardware for scalable applications. Scalable v...
Harald Devos, Hendrik Eeckhaut, Mark Christiaens, ...
FPL
2010
Springer
180views Hardware» more  FPL 2010»
14 years 7 months ago
A Karatsuba-Based Montgomery Multiplier
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
Gary Chun Tak Chow, Ken Eguro, Wayne Luk, Philip L...
ERSA
2006
161views Hardware» more  ERSA 2006»
14 years 10 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
IOLTS
2003
IEEE
138views Hardware» more  IOLTS 2003»
15 years 2 months ago
An Analog Checker With Input-Relative Tolerance for Duplicate Signals
We discuss the design of a novel analog checker that monitors two duplicate signals and provides a digital error indication when their absolute difference is unacceptably large. Th...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris