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TC
2008
14 years 9 months ago
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations
This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In ...
Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. V...
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
15 years 3 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
EH
1999
IEEE
351views Hardware» more  EH 1999»
15 years 1 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
FPL
2011
Springer
203views Hardware» more  FPL 2011»
13 years 9 months ago
Accelerating Fluid Registration Algorithm on Multi-FPGA Platforms
Abstract—In the clinical applications, medical image registrations on the images taken from different times and/or through different modalities are needed in order to have an obj...
Jason Cong, Muhuan Huang, Yi Zou
IPPS
1998
IEEE
15 years 1 months ago
A Configurable Computing Approach Towards Real-Time Target Tracking
Traditionally, tracking systems require dedicated hardware to handle the computational demands and input/output rates imposed by real-time video sources. An alternative presented i...
Bharadwaj Pudipeddi, A. Lynn Abbott, Peter M. Atha...