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» A Survey of CORDIC Algorithms for FPGA Based Computers
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ICCAD
2004
IEEE
150views Hardware» more  ICCAD 2004»
14 years 3 months ago
Hermes: LUT FPGA technology mapping algorithm for area minimization with optimum depth
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
Maxim Teslenko, Elena Dubrova
IPPS
2006
IEEE
14 years 7 days ago
FPGA based architecture for DNA sequence comparison and database search
DNA sequence comparison is a computationally intensive problem, known widely since the competition for human DNA decryption. Database search for DNA sequence comparison is of grea...
Euripides Sotiriades, Christos Kozanitis, Apostolo...
ARC
2008
Springer
141views Hardware» more  ARC 2008»
13 years 8 months ago
A Parallel Hardware Architecture for Image Feature Detection
Abstract. This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architect...
Vanderlei Bonato, Eduardo Marques, George A. Const...
EUSFLAT
2009
137views Fuzzy Logic» more  EUSFLAT 2009»
13 years 4 months ago
Novel Methods for the Design of General Type-2 Fuzzy Sets based on Device Characteristics and Linguistic Labels Surveys
Fuzzy Logic Systems are widely recognized to be successful at modelling uncertainty in a large variety of applications. While recently interval type-2 fuzzy logic has been credited...
Christian Wagner, Hani Hagras
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
13 years 10 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor