1283 search results - page 203 / 257 » A Survey on Temporal Logics |
ASPDAC
2007
ACM
15 years 3 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
104
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CMSB
2009
Springer
15 years 3 months ago
2009
Springer
Abstract. In systems biology, the number of models of cellular processes increases rapidly, but re-using models in different contexts or for different questions remains a challengi...
107
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ATVA
2006
Springer
15 years 3 months ago
2006
Springer
In the past decades, many formal frameworks (e.g. timed automata and temporal logics) and techniques (e.g. model checking and theorem proving) have been proposed to model a real-ti...
ECBS
2006
IEEE
15 years 3 months ago
2006
IEEE
The paper depicts experiments and results with preditraction based verification applied to infinite state Predicate abstraction is a method for automatic tion of abstract state sp...
FSTTCS
2006
Springer
15 years 3 months ago
2006
Springer
We establish a decidability boundary of the model checking problem for infinite-state systems defined by Process Rewrite Systems (PRS) or weakly extended Process Rewrite Systems (w...