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» A System Architecture for Reconfigurable Trusted Platforms
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126
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IPPS
2006
IEEE
15 years 8 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
ERSA
2009
107views Hardware» more  ERSA 2009»
14 years 11 months ago
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
Kenneth C. Rovers, Marcel D. van de Burgwal, Jan K...
130
Voted
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
15 years 10 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
98
Voted
SAC
2006
ACM
15 years 7 months ago
BambooTrust: practical scalable trust management for global public computing
Global public computing platforms, such as PlanetLab, grid computing systems, and XenoServers, require facilities for managing trust to allow their participants to interact effect...
Evangelos Kotsovinos, Aled Williams
137
Voted
DAC
2011
ACM
14 years 1 months ago
TPM-SIM: a framework for performance evaluation of trusted platform modules
This paper presents a simulation toolset for estimating the impact of Trusted Platform Modules (TPMs) on the performance of applications that use TPM services, especially in multi...
Jared Schmitz, Jason Loew, Jesse Elwell, Dmitry Po...