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DATE
2006
IEEE
134views Hardware» more  DATE 2006»
15 years 3 months ago
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
15 years 6 months ago
Clustering for processing rate optimization
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
Chuan Lin, Jia Wang, Hai Zhou
JMLR
2011
117views more  JMLR 2011»
14 years 4 months ago
Parameter Screening and Optimisation for ILP using Designed Experiments
Reports of experiments conducted with an Inductive Logic Programming system rarely describe how specific values of parameters of the system are arrived at when constructing model...
Ashwin Srinivasan, Ganesh Ramakrishnan
JRTIP
2008
249views more  JRTIP 2008»
14 years 9 months ago
Model-based mapping of reconfigurable image registration on FPGA platforms
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
Mainak Sen, Yashwanth Hemaraj, William Plishker, R...
ACMDIS
2000
ACM
15 years 2 months ago
Bridge for Buttons - A GUI Design Methodology Applied in Non-GUI Consumer Product Design
This paper describes the experience gained in the case study of adapting the Bridge, a GUI design method to the design of non-GUI interactive consumer products. An industrial desi...
Simo Säde, Katja Battarbee