Sciweavers

452 search results - page 46 / 91
» A Systematic Process to Design Product Line Architecture
Sort
View
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 3 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
IJCIS
1998
116views more  IJCIS 1998»
14 years 11 months ago
Distributed Query Scheduling Service: An Architecture and Its Implementation
We present the systematic design and development of a distributed query scheduling service DQS in the context of DIOM, a distributed and interoperable query mediation system 26 ...
Ling Liu, Calton Pu, Kirill Richine
CF
2004
ACM
15 years 5 months ago
Fault tolerant clockless wave pipeline design
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yon...
ISCA
2002
IEEE
112views Hardware» more  ISCA 2002»
15 years 4 months ago
Drowsy Caches: Simple Techniques for Reducing Leakage Power
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
Krisztián Flautner, Nam Sung Kim, Steven M....
RE
2001
Springer
15 years 4 months ago
Software Acquisition: A Business Strategy Analysis
This paper argues that there are new insights to be gained from a strategic analysis of requirements engineering. The paper is motivated by a simple question: what does it take to...
Barbara Farbey, Anthony Finkelstein