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» A Tamper-Resistant Programming Language System
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ASPLOS
2011
ACM
14 years 8 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
ECOOP
2012
Springer
13 years 6 months ago
Enhancing JavaScript with Transactions
Abstract. Transcript is a system that enhances JavaScript with support for transactions. Hosting Web applications can use transactions to demarcate regions that contain untrusted g...
Mohan Dhawan, Chung-chieh Shan, Vinod Ganapathy
TON
2012
13 years 6 months ago
Opportunistic Spectrum Access in Multiple-Primary-User Environments Under the Packet Collision Constraint
—Cognitive Radio (CR) technology has great potential to alleviate spectrum scarcity in wireless communications. It allows secondary users (SUs) to opportunistically access spectr...
Eric Jung, Xin Liu
OOPSLA
2004
Springer
15 years 9 months ago
AJEER: an aspectJ-enabled eclipse runtime
There are a number of technologies designed to improve modularity in software systems. The technique presented here combines two of them seamlessly to exploit their respective ben...
Martin Lippert
ICFP
2007
ACM
16 years 4 months ago
Feedback directed implicit parallelism
In this paper we present an automated way of using spare CPU resources within a shared memory multi-processor or multi-core machine. Our approach is (i) to profile the execution o...
Tim Harris, Satnam Singh