ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
Nicola Dragone, Akshay Aggarwal, L. Richard Carley
- Gene regulatory networks allow us to study and understand genes’ roles in biological processes. Among others, regulatory networks help to identify pathway initiator genes and t...
Abstract—In this paper we propose a novel statistical framework to model the impact of process variations on semiconductor circuits through the use of process sensitive test stru...
— We present an algorithm for pose estimation using fixed-lag smoothing. We show that fixed-lag smoothing enables inclusion of measurements from multiple asynchronous measureme...