Sciweavers

899 search results - page 102 / 180
» A Temporal Language for SystemC
Sort
View
DATE
2008
IEEE
100views Hardware» more  DATE 2008»
15 years 8 months ago
A Mapping Framework for Guided Design Space Exploration of Heterogeneous MP-SoCs
When designing heterogeneous MP-SoCs designers have to take into account various objectives such as power, die size, flexibility, performance or programmability. But to be able t...
Bastian Ristau, Torsten Limberg, Gerhard Fettweis
DATE
2006
IEEE
119views Hardware» more  DATE 2006»
15 years 7 months ago
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf
FDL
2005
IEEE
15 years 7 months ago
Executable Specification of Novel Display Controllers
To address performance limitations and expand their applications range, emerging and mature display technologies rely on the design of novel display controllers. Under current mod...
David Antonio-Torres, Paul F. Newbury, Paul F. Lis...
IFIP
2004
Springer
15 years 7 months ago
Looking Inside AES and BES
We analyze an algebraic representation of AES–128 as an embedding in BES, due to Murphy and Robshaw. We present two systems of equations S and K concerning encryption and key gen...
Ilia Toli, Alberto Zanoni
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
15 years 6 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...