1860 search results - page 150 / 372 » A Temporal Logic of Robustness |
106
Voted
ECML
2003
Springer
15 years 6 months ago
2003
Springer
A central issue in logical concept induction is the prospect of inconsistency. This problem may arise due to noise in the training data, or because the target concept does not fit...
111
Voted
TIME
2007
IEEE
15 years 7 months ago
2007
IEEE
We present a symbolic algorithm for deciding safety (reachability) of timed systems modelled as Timed Automata (TA), under the notion of robustness w.r.t. infinitesimal clock-drif...
73
Voted
ISCAS
2002
IEEE
15 years 5 months ago
2002
IEEE
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
119
Voted
ICCAD
2006
IEEE
15 years 9 months ago
2006
IEEE
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
105
Voted
DDECS
2009
IEEE
15 years 7 months ago
2009
IEEE
—Quasi Delay Insensitive asynchronous logic is a very robust system allowing safe implementations while requiring minimal timing assumptions. Unfortunately the design methodologi...